The use of asymmetric devices in Silicon-On-Insulator (SOI) technologies is now widespread in the industry. However, embedded silicon germanium (eSiGe) PFETs experience lower floating body effects. The floating body effect is specific to transistors formed on substrates having an insulator layer. In particular, the neutral floating body is electrically isolated by source/drain and halo extension regions that form oppositely poled diode junctions at the ends of the transistor conduction channel and floating body, while the gate electrode is insulated from the conduction channel through a dielectric. The insulator layer in the substrate completes insulation of the conduction channel and thus prevents discharge of any charge that may develop in the floating body. Charge injection into the neutral body when the transistor is not conducting develops voltages in the conduction channel in accordance with the source and drain diode characteristics. The floating body effect is induced by the excess carriers generated by hot electrons near the gradient drain region, resulting in the enhancement in the body potential in SOI devices. It induces a threshold voltage reduction, resulting in a kink in output characteristics. The voltage developed due to charge collection in the transistor conduction channel has the effect of altering the switching threshold of the transistor. This effect, in turn, alters the signal timing and signal propagation speed, since any transistor will have a finite slew rate and the rise and fall time of signals is not instantaneous even when gate capacitance is very small. SOI switching circuits, in particular, suffer from severe dynamic floating body effects such as hysteresis and history effects. The onset of the kink effect in SOI switching circuits strongly depends on operating frequency, and produces Lorentzian-like noise overshoot and harmonic distortion. Therefore, the direct current performance advantage for a PFET with asymmetric halos is reduced to zero.